# 555 Timer - 2. Monostable Multivibrator Configuration

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In the previous article, we understood the internal working of the 555 timers. In this article, we'll be looking at the monostable mode of operation of the 555 timers. Before that, one should have a general idea about what exactly is a monostable multivibrator.

A monostable multivibrator is basically an electronic device having only one stable state out of the two possible logic states: HIGH or LOW. When a monostable multivibrator is triggered externally, it produces a single output pulse in the “unstable” state for a short duration and then returns back to the stable state.

We can easily make our 555 timers behave like a monostable multivibrator just by connecting a resistor, a capacitor, and a triggering switch as shown in the below figure.

• A resistor is connected between VCC and the common node of threshold (6) and discharge pin (7), and a capacitor is connected between the common node and ground. The voltage across the capacitor acts like input for the threshold and discharge pin.
• An external switch is connected to the trigger pin (2) of the timer via a pull-up network, and it is used to control the output of the timer.
• The reset pin (4) of the IC is connected to VCC to avoid any accidental resets during the operation.
• The control voltage pin (5) is connected to the ground via a small capacitor to avoid noise when not in use.

In the monostable mode of the 555 timer, also known as the "one-shot mode", when we apply a logic LOW to the trigger pin of the timer by closing the switch, the output becomes logic HIGH and holds there for a specific time duration (T), which is decided by the values of the externally connected resistor and capacitor. This time period T is calculated by the following relation,

where R is in Ohms and C is in Farads. We can increase or decrease this time period by increasing or decreasing the values of the resistor and capacitor respectively. After the time period T, the output again falls back to logic LOW and waits for the next trigger.

There’s something important to note here. If another event is triggered during a previous event when the output pulse is high, it’ll simply not respond to the trigger. As you can see in Figure 3, we get an output pulse due to the 1st and 3rd trigger pulse but the 2nd trigger pulse is simply ignored.

This is how we make a 555 timer act like a monostable multivibrator. But what’s happening under the hood? We’ll be discussing that in the next section of the article, and if you haven't read our previous tutorial "Introduction to 555 timers", we highly encourage you to check it out before proceeding further.

## Internal Operation as a Monostable Multivibrator

#### Initial Conditions

Initially, the switch is open so the trigger pin is pulled up to VCC and the flip flop is reset by applying a logic LOW to the external Reset pin of the 555 timers (not the input RESET of the flip flop). This sets the initial outputs of the flip flop, Q as logic LOW and QBAR as logic HIGH. Because the output driving circuit is an inverting circuit connected to the QBAR output of flip flop, we get the final output of the 555 timer IC as logic LOW.

When we talk about the operation, the capacitor plays an extremely important role here. As visible from the figure, we can see that the external capacitor is connected to the collector of the discharge transistor and to VCC through the external resistor. So initially when QBAR is logic HIGH, the discharge transistor gets switched ON, and it connects the capacitor to the ground. Now the capacitor has two paths to take and it will always prefer the least resistive path out of the available paths. In this case, the least resistive path is towards the ground through the discharge transistor so the capacitor will continuously discharge.

The capacitor voltage is given as an input to the threshold pin of the 555 timer which goes to the upper comparator. So the initial output of the comparators, or it can also be said that the initial inputs to the flip flop are logic LOW on both the input pins S and R, which is the memory state of the flip flop.

#### Operating Conditions

The operation begins when we apply a logic LOW on the trigger pin by closing the switch for a short duration. As the trigger pin is an input to the lower comparator, the output of the comparator becomes a logic HIGH as the voltage on the non-inverting input of the comparator will become more than the inverting pin of the comparator. This will set the output Q of the flip flop to logic HIGH and QBAR as logic LOW. The QBAR output gets inverted and we get a logic HIGH as the output of the 555 timer IC.

Now what's interesting are the changes that happen to the capacitor because of this output. The discharge transistor connected to QBAR gets switched OFF. This cuts off the path for the capacitor to get discharged, which was the lowest resistance path for the capacitor till now. So now the capacitor has no option but to get charged to VCC through the resistor.

The increasing voltage across the capacitor will also increase the voltage on the threshold pin of the 555 timer IC. After the time period T, the voltage on the threshold pin crosses the ⅔ VCC reference voltage of the comparator and the upper comparator switches the output from logic LOW to logic HIGH. This resets the flip flop and now the Q output is logic LOW and QBAR is logic HIGH.

This switches on the discharge transistor and again our capacitor has the least resistive path to 0V and it gets discharged. After discharging, the voltage on the threshold pin is also 0V, lesser than the ⅔ VCC reference voltage, and hence the comparator outputs a logic LOW. And the lower comparator also outputs logic LOW because the trigger pulse was given only for a short duration. With this, the flip flop enters the memory state again, ready for the next input pulse.

And that’s how a 555 timer as a monostable multivibrator works on the inside - fascinating, isn’t it? In the upcoming tutorials, we'll be discussing in detail the configuration and working of 555 timers in Bistable and Astable modes.

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