555 Timer - 3. Bistable Multivibrator Configuration

In the previous article, we took an in-depth look at the internal working of the 555 timers in the monostable mode. If you've understood the previous tutorial, this one will be pretty easy for you. We'll be looking at the bistable mode of the 555 timer which is actually the simplest mode out of all.

Let's start with understanding the behavior of a simple bistable multivibrator, and then we'll be seeing how we can make a 555 timer act similar to it.

The name "bi-stable" is self-explanatory. A bistable multivibrator is an electronic device with two stable states. That means the circuit stays at either of the two states, HIGH or LOW unless externally triggered to switch between them. In the previous tutorial, we explained how a monostable multivibrator, when triggered, automatically returns to its stable state after staying in the unstable state for a certain time duration. However, in the case of a bistable multivibrator, we need a second trigger to make it return to its original stable state, i.e., it doesn't return automatically. This is the main difference between a monostable and a bistable multivibrator. Now let's talk about how we can configure our 555 timers to act as a bistable device.

The bistable mode of the 555 timers is controlled using two pull-up configurations connected to the external pins of the timer. We can easily make a pull-up configuration using a resistor and a switch. If you want to know more about the working and uses of pull-up configurations, please check out this EEFAQ - Why Are Pull-Up and Pull-Down Resistors Used?

• The first pull-up network, made using the resistor R1 and switch S1 is connected to the trigger pin (2) of the timer.
• And the second pull-up network consisting of R2 and S2 is connected to the reset pin (4) of the timer. The reset pin is an active low pin so the flip flop is reset only when a logic LOW is applied to the pin.
• The control pin (5) is connected to the ground through a 10nF capacitor.
• We'll simply leave the discharge pin (7) of the timer unconnected because in this mode of operation there isn't any capacitor to charge or discharge.
• The threshold pin is grounded in this mode to avoid accidental reset due to the R input of the flip flop.

The working of the bistable mode is pretty straightforward to understand. Initially, both the switches are open. So the trigger pin and reset pin of the timer, both have V_CC or logic HIGH as the input. This means the voltage on the inverting input of the lower or trigger comparator is V_CC and the voltage on the non-inverting input is 1/3V_CC. Due to this, the lower comparator outputs a logic LOW, which means the S input of the flip flop is also a logic LOW.

As you can see in the schematic, we've grounded the threshold pin. In that case, the fixed reference voltage of 2/3V_CC on the inverting input of the upper comparator will always be more than the voltage on the non-inverting input of the comparator. This is why the comparator will always output a logic LOW, and the R input of the flip-flop will also always be a logic LOW.

So when both the switches are open initially, the inputs to the flip flop are logic LOW on both the S and R inputs, and the flip flop is said to have entered the memory state. So the output of the flip flop is Q as logic LOW and QBAR as a logic HIGH. Because the output driving circuit is an inverting circuit, we get a logic LOW as the output of the timer.

The operation begins when we close the trigger switch (S2). This makes the input on the trigger pin a logic LOW because now the least resistive path for the trigger pin is towards the ground through the trigger switch. This makes the inverting input of the lower comparator less than the non-inverting input, and changes the output of the comparator from logic LOW to logic HIGH. An important thing to note here is that the switch is closed only for a momentary duration, and is opened again. But that short pulse is enough to trigger and change the output of the timer.

The logic HIGH at the lower comparator sets the flip-flop and makes Q logic HIGH and QBAR as logic LOW. So we get the output of the timer as a logic HIGH signal.

Because the switch was reopened instantly after applying the signal, the lower comparator changes the output back to logic LOW. This makes the flip flop enter the memory state with the output of the timer as logic HIGH. Even if we close the trigger switch (S2) again in this condition, it will not change the output of the timer. The output will stay in the HIGH state until we close the reset switch (S1).

Now when the reset switch (S1) is closed for a momentary duration, the reset pin of the timer is short-circuited to the ground. This provides a logic LOW on the reset pin. As previously mentioned, because the reset pin is an active low pin, closing the switch resets the flip flop and the output Q of the flip flop becomes logic LOW and QBAR becomes logic HIGH. So the final output of the timer resets back to logic LOW. The timer has now reached the initial stable state once again, ready for the next input.

The figure below represents the complete output waveform of the bistable mode of the 555 timers. You can see in the figure that the output switches to HIGH when the trigger is pulled LOW, and the output switches back to LOW when the reset pin is pulled LOW.

That's it! Now you understand another mode of the 555 timers. We hope you enjoyed reading through it. In the next tutorial, we'll be taking a look at the most interesting and useful configuration of the 555 timers: The astable mode.