What is the difference between a normal semiconductor device and a power semiconductor device?

Power semiconductor devices are capable of handling large currents and can block large voltages which their normal semiconductor counterparts, used in analog electronic circuits, would never be capable of. While both are made up of semiconductor materials, there are various techniques used while fabricating power semiconductor devices which impart large power handling capabilities.

Power semiconductor devices are predominantly used as switches in a power electronics circuit. So, in their off state, they behave like an open circuit and block the current through them. The maximum amount of voltage a power semiconductor device can withstand in its off state is called its voltage rating and is specified on a device’s datasheet under the Absolute Maximum Ratings.

Further they are required to conduct current without offering much resistance in their on state, just like a short circuit. The current rating of a power semiconductor device is the amount of current that can flow through the device without the device getting permanently damaged by excessive heating due to the power dissipation.

In an analog device, the silicon wafer is doped with acceptor impurities to form the p layer and doped with donor impurities to form the n layer. The usual impurity doping concentration in an analog device is on the order 10¹⁴ atoms/cm³ to 10¹⁷ atoms/cm³.

However, the concentration of impurities is of the order 10¹⁹ atoms/cm³ in a power semiconductor device simply because more doping generates more charge carriers - hence greater current rating. The high concentration doping of the n and the p layer is denoted by adding a ‘+’ as a superscript denoting them as n⁺ layer and p⁺ layer.

The current density in a power device is proportional to the total area available for the flow of charges. To increase the current density in a power semiconductor device, the cross section of the device is increased. This is achieved by using a vertical structure instead of the planar or lateral structure like in an analog semiconductor device. Increasing the current density automatically increases the current rating of the device. So, power semiconductor devices are, in general, vertical in nature.

For example, the current rating of a diode is in the order of mA typically. Following the two techniques mentioned above - of increasing the doping and increasing the cross section, the current rating of a power diode is increased in the range of one amp to several thousand amps.

When a power semiconductor device being used as a switch is in its off state, it blocks the current and disconnects the load from the voltage across it. However, if the voltage exceeds a certain limit, the device breaks down and starts conducting current and may also get permanently damaged in the process. This value of voltage which when applied across the device causes it to break down and conduct is termed as the breakdown voltage. The higher the breakdown voltage of a device, the higher is its voltage rating. To understand how the voltage rating of the power semiconductor device is increased, we will need to look at the expression of breakdown voltage first. Whenever a pn junction is formed in a semiconductor, there is a breakdown voltage associated with it, denoted as V_BD.

Let’s get into the math of how to find this breakdown voltage, showing its relationship with the semiconductor materials as well. Let’s start where V_BD is given by:

To better understand this equation, here is the breakdown of all the terms:

• E_BD is the electric field which exists in the device when a voltage equal to the breakdown voltage is applied across it
• ɛ is the relative permittivity of the semiconductor material
• ε₀ = 8.85×10^-12 F/m is the permittivity of free space
• N_A is the doping concentration of the acceptor impurity in the semiconductor
• N_D is the doping concentration of the donor impurity in the semiconductor
• q = 1.6×10^-19C magnitude of the charge of an electron

As we can see from the expression for V_BD, the breakdown voltage is proportional to the sum of reciprocal of the concentrations of the impurities. By decreasing N_D - the doping concentration of the donor impurity in the n type material, we can see that the expression of V_BD will tend to get dominated by the 1/N_D term (1/N_A can be neglected).

N_D is usually of the order 10¹³ atoms/cm³ when we intend to achieve a high voltage rating. Such low concentration of dopants in the n layer makes it an n^- layer now. This n^- layer is often known as the drift layer. Thus, breakdown voltage rating has been increased significantly with the help of the n^- layer.

So how is this implemented in practice? Let's see this with the help of a power semiconductor diode’s structure.

As we can see an additional n^- layer is introduced in the power diode. This layer is what helps increase the breakdown voltage of the device.

One may wonder if the introduction of a n^- layer may decrease the current rating due to the deficit of impurity atoms which furnish the charge carriers in the n^- layer. That is exactly the case. In fact, the resistance offered by the drift layer produces a lot of heat due to power dissipation for which cooling arrangements will have to be provided to safeguard the device. However, it’s a compromise in order to increase the voltage rating of the device.

The introduction of n^- layer and increasing the doping concentration is not just limited to power semiconductor diodes. In a power BJT, an additional n^- drift layer is introduced in the collector of the power BJT to increase the voltage rating. The emitter and collector are heavily doped n⁺ layers.

The structure of a power MOSFET is slightly different from its analog counterpart. The substrate is a n layer. An n⁺ layer is grown on it which acts as the drain terminal. A n^- drift layer is also introduced to increase the voltage rating. Two p wells are diffused towards the top and smaller n⁺ regions are diffused again into each of the two p-wells. Due to this double diffusion this configuration is known as diffused metal-oxide-semiconductor or DMOS. The n⁺ regions are connected to the source terminal. These n⁺ regions help increase the current rating. This now behaves as a n-channel MOSFET with high voltage and current ratings.

Using a high concentration doped n⁺ and p⁺ layer along with the vertical structure of the device the current rating of the power semiconductor device can be increased. The voltage rating of the power semiconductor device can be increased by the introduction of the n^- drift layer. Adopting such techniques for the fabrication of a power electronic device has enabled engineers to design powerful power electronic converters which could not have been built with the techniques of small signal analog devices.