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Electronics Reference

Field-Effect Transistors (DC Analysis)

Field-Effect Transistor (FET)

Drain Currentlatex!encoded:base64,XHRleHRybXtJfV97XHRleHRybXtEfX09XHRleHRybXtJfV97XHRleHRybXtEU1N9fVxsZWZ0ICggMS1cZnJhY3tcdGV4dHJte1Z9X3tcdGV4dHJte0dTfX19e1x0ZXh0cm17Vn1fe1x0ZXh0cm17UH19fSBccmlnaHQgKV57Mn0=
Gate to Source Voltagelatex!encoded:base64,XHRleHRybXtWfV97XHRleHRybXtHU319PVx0ZXh0cm17Vn1fe1x0ZXh0cm17UH19XGxlZnQgKCAxLVxzcXJ0e1xmcmFje1x0ZXh0cm17SX1fe1x0ZXh0cm17RH19fXtcdGV4dHJte0l9X3tcdGV4dHJte0RTU319fX0gXHJpZ2h0ICk=
Power Dissipationlatex!encoded:base64,XHRleHRybXtQfV97XHRleHRybXtEfX09XHRleHRybXtWfV97XHRleHRybXtEU319XHRleHRybXtJfV97XHRleHRybXtEfX0=
Resistance at a particular level of VGSlatex!encoded:base64,XHRleHRybXtyfV97ZH09XGZyYWN7XHRleHRybXtyfV97b319e1xsZWZ0ICggMS1cZnJhY3tcdGV4dHJte1Z9X3tcdGV4dHJte0dTfX19e1x0ZXh0cm17Vn1fe1x0ZXh0cm17UH19fSBccmlnaHQgKV57Mn19
Drain Current (MOSFET/MESFET Enhancement type)latex!encoded:base64,XHRleHRybXtJfV97XHRleHRybXtEfX09ayBcbGVmdCAoIFx0ZXh0cm17Vn1fe1x0ZXh0cm17R1N9fS1cdGV4dHJte1Z9X3tcdGV4dHJte1R9fX0gXHJpZ2h0ICleezJ9

latex!encoded:base64,az1cZnJhY3tcdGV4dHJte0l9X3tcdGV4dHJte0R9X3tcbGVmdCAoIFx0ZXh0cm17T059IFxyaWdodCApfX19e1xsZWZ0ICggXHRleHRybXtWfV97XHRleHRybXtHU31fe1xsZWZ0ICggXHRleHRybXtPTn0gXHJpZ2h0ICl9fS1cdGV4dHJte1Z9X3tcdGV4dHJte1R9fX0gXHJpZ2h0ICleezJ9IFxyaWdodCApfQ==
 > Field-Effect Transistor (FET)

Fixed-Bias Configuration

Gate to Source Voltagelatex!encoded:base64,XHRleHRybXtWfV97XHRleHRybXtHU319PS1cdGV4dHJte1Z9X3tcdGV4dHJte0dHfX0=
Drain to Source Voltagelatex!encoded:base64,XHRleHRybXtWfV97XHRleHRybXtEU319PVx0ZXh0cm17Vn1fe1x0ZXh0cm17RER9fS1cdGV4dHJte0l9X3tcdGV4dHJte0R9fVx0ZXh0cm17Un1fe1x0ZXh0cm17RH19
 > Fixed-Bias Configuration

Self-Bias Configuration

Gate to Source Voltagelatex!encoded:base64,XHRleHRybXtWfV97XHRleHRybXtHU319PS1cdGV4dHJte0l9X3tcdGV4dHJte0R9fVx0ZXh0cm17Un1fe1x0ZXh0cm17U319
Drain to Source Voltagelatex!encoded:base64,XHRleHRybXtWfV97XHRleHRybXtEU319PVx0ZXh0cm17Vn1fe1x0ZXh0cm17RER9fS1cdGV4dHJte0l9X3tcdGV4dHJte0R9fSBcbGVmdCAoIFx0ZXh0cm17Un1fe1x0ZXh0cm17U319K1x0ZXh0cm17Un1fe1x0ZXh0cm17RH19IFxyaWdodCAp
 > Self-Bias Configuration

Voltage-Divider Bias Configuration

Gate Terminal Voltagelatex!encoded:base64,XHRleHRybXtWfV97XHRleHRybXtHfX09XGxlZnQgKCBcZnJhY3tcdGV4dHJte1J9X3syfX17XHRleHRybXtSfV97MX0rXHRleHRybXtSfV97Mn19IFxyaWdodCApIFx0ZXh0cm17Vn1fe1x0ZXh0cm17RER9fQ==
Gate to Source Voltagelatex!encoded:base64,XHRleHRybXtWfV97XHRleHRybXtHU319PVx0ZXh0cm17Vn1fe1x0ZXh0cm17R319LVx0ZXh0cm17SX1fe1x0ZXh0cm17RH19XHRleHRybXtSfV97XHRleHRybXtTfX0=
Drain to Source Voltagelatex!encoded:base64,XHRleHRybXtWfV97XHRleHRybXtEU319PVx0ZXh0cm17Vn1fe1x0ZXh0cm17RER9fS1cdGV4dHJte0l9X3tcdGV4dHJte0R9fSBcbGVmdCAoIFx0ZXh0cm17Un1fe1x0ZXh0cm17U319K1x0ZXh0cm17Un1fe1x0ZXh0cm17RH19IFxyaWdodCAp
 > Voltage-Divider Bias Configuration

Common-Gate Configuration

Gate to Source Voltagelatex!encoded:base64,XHRleHRybXtWfV97XHRleHRybXtHU319PVx0ZXh0cm17Vn1fe1x0ZXh0cm17U1N9fS1cdGV4dHJte0l9X3tcdGV4dHJte0R9fVx0ZXh0cm17Un1fe1x0ZXh0cm17U319
Drain to Source Voltagelatex!encoded:base64,XHRleHRybXtWfV97XHRleHRybXtEU319PVx0ZXh0cm17Vn1fe1x0ZXh0cm17RER9fStcdGV4dHJte1Z9X3tcdGV4dHJte1NTfX0tXHRleHRybXtJfV97XHRleHRybXtEfX0gXGxlZnQgKCBcdGV4dHJte1J9X3tcdGV4dHJte1N9fStcdGV4dHJte1J9X3tcdGV4dHJte0R9fSBccmlnaHQgKQ==
 > Common-Gate Configuration
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